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Samsung’s X-Cube 3D stacking tech for 7nm chips is now ready

By Ng Chong Seng - on 13 Aug 2020, 3:27pm

Samsung’s X-Cube 3D stacking tech for 7nm chips is now ready

(Image: Samsung.)

Samsung has announced that its eXtended-Cube (X-Cube) 3D IC packaging technology is now ready to be deployed at 7nm and 5nm EUV process nodes.

Based on Samsung’s through-silicon via (TSV) technology, the company has recently successfully built a 7nm X-Cube test chip that stacked the SRAM (usually used for cache memory for the CPU) on top of a logic die. A smaller footprint aside, this tech also frees up precious space for more memory to be packed on the chip.

Data transfer speed and energy efficiency are also improved thanks to the significantly shorter signal paths between the dies, according to Samsung. Imagine wires going through the layers and making direct connections instead of snaking around the controller and you get the idea.

Samsung will present the X-Cube at Hot Chips, which is an annual conference on high-performance computing. Due to Covid-19, this year’s Hot Chips will be livestreamed between Aug 16 and 18.

Source: Samsung.