Intel is betting on glass substrates for its future high-performance chips
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Intel is betting on glass substrates for its future high-performance chips
Keeping up Moore’s Law is no small feat as we approach ever more complex process nodes and transistor density, but advancing the silicon die process via new materials, layering, chemistry, and photolithography techniques isn’t the only road to levelling up performance and area gains in a meaningful manner.
As seen in our Intel Penang factory tour that focuses on bringing several high-performance chips to life, such as Intel’s 4th Gen Xeon scalable processors and the upcoming Meteor Lake processors, even advanced packaging techniques help make the difference. One of the critical enablers of Meteor Lake is the Intel Foveros 3D stacking technology that allows Intel to stack silicon over silicon tightly using solder. The die tiles communicate with each other through high bandwidth, low latency connections, which is essential to support a disaggregated architecture to manage high bandwidth demands in a compact and efficient form factor. Over on the latest Xeon, EMIB packaging uses a silicon bridge embedded in the substrate for ultra-high speed connectivity between dies.
Yet another aspect of packaging that hasn’t been discussed in a long time is the organic substrate used on most processors that form the essential linkage to connect with the motherboard. As processor designs are getting complex and large in industrial and enterprise deployment, Intel is concerned that adding ever more dies on an organic substrate will lead it to warpage during the production process.
After a decade of research, Intel has achieved industry-leading glass substrates for advanced packaging. We look forward to delivering these cutting-edge technologies that will benefit our key players and foundry customers for decades to come. -- Babak Sabi, Intel SVP and GM of Assembly and Test Development
While we’re still far from facing this dilemma, Intel’s R&D has been working on an alternative using a glass core substrate. Glass being a more rigid material, can handle more dies on a package. In fact Intel’s research claims it allows a 50% larger die area on the same package size.
But that’s not all. Intel says glass substrates significantly improve electrical and mechanical properties over traditional substrates. In addition to being more rigid, it’s also more tolerant of high temperatures, which bodes well for retaining higher signal integrity, which translates to improved performance.
Intel also says glass substrate enables them to adopt even tighter and smaller line spacing. The benefit is that it reduces the number of metal layers conventionally required and the package size. Conversely, if the complexity is retained as-is, Intel can cram more functions and cores on the processors. In a nutshell, feature scaling. The new substrate also enables bump pitch scaling, which allows greater interconnect density, or it can help reduce complexity to improve die size and power required. Lastly, it also allows high-speed signalling – up to 448G without the complexity and cost of transitioning to optical interconnects.
With these many benefits, glass core substrates will allow chip architects to create high-density, high-performance ultra-large form-factor packages with high assembly yields for data-intensive workloads such as AI and the future data centre.
