We visited the factory that assembles Intel's next-gen Meteor Lake CPUs
Intel's Malaysia operations are the reason why you're getting the latest and greatest. After all, they also produce the latest Xeons and Ponte Vecchio data centre GPU, their most complex offering ever.
By Vijay Anand -
Note: This feature was first published on 11 September 2023. If you're looking to learn about the Meteor Lake processor architecture, head over here.
No, that isn’t a Meteor Lake since they are all needed in your next-gen notebooks. Nevertheless, I got to hold Intel’s most ambitious product to date, the 100-billion transistor Ponte Vecchio data centre GPU – which is also assembled here in Intel Penang.
The magic of planet-scale orchestration, the Intel way
Did you know there's a whole chain of complex processes beyond wafer production at wafer fab plants to transform them into processors used in laptops and servers? Most tech publications like ours often focus on the wafer fab capabilities as they dictate the output possibilities for meeting the industry's needs. However, there are four other vital stages beyond wafer fabrication that help get processors out to consumers and businesses that are not often discussed.
AK Chong, VP of Manufacturing, Supply Chain and Operations, MD for Intel Malaysia site and GM of the System Integration & Manufacturing Services (SIMS) operations in the Assembly Test Manufacturing (ATM) group at Intel Corporation, proudly showcased Intel Malaysia’s capabilities and future plans.
Chiefly, they are the advanced packaging stage, die prep and die sorting, die assembly and testing, and finally, board and system-level integration testing. While Intel's homeland, USA, has several wafer fab plants, most of the packaging, assembly and testing phases occur across overseas sites. Of them, Malaysia is the company's very first offshore site from way back in 1972.
Fifty-one years later, it is home to 15,000 employees with over 900,000 square feet of manufacturing capacity in Penang. Its current and upcoming facilities are capable of handling all the stages after receiving a silicon wafer. It is also home to the design and development stages of Intel's next-generation Meteor Lake processors, including its high-volume manufacturing.
Malaysia surprisingly played a huge role in Meteor Lake’s design and production. We learn something new every day. (Image source: Intel)
We expect Meteor Lake-based processors (also otherwise now referred to as Intel Core Ultra) to be formally announced at Intel’s upcoming Innovation event and show up in laptops by the start of 2024. This is why Intel took the opportunity to gather the world’s top tech publications (like HardwareZone, of course) and analysts to showcase what they are capable of at Intel’s Penang factories ahead of the official announcement. It is also the very first time that Intel is opening up its Penang factories to the press at such a large scale and with broad access to most of the critical stages that processors undergo to convert them into their final form – be it shipped off to laptop manufacturers, or to be boxed up for retail sales. As such, we truly appreciate the access and logistics they’ve arranged to make the Intel Tech Tour Malaysia such an eye-opener.
Intel’s global manufacturing network.
In essence, the Intel Penang operations play a vital role in upholding Intel’s IDM 2.0 leadership plan (where IDM stands for Integrated Device Manufacturer) outlined by CEO Pat Gelsinger to uplift the internal factory network and support at-scale manufacturing in-house. Intel has already invested billions into its Penang factories, but they are not stopping anytime soon.
Intel’s Corporate Vice President and GM of APAC, Steve Long, opened the Tech Tour Malaysia event and re-iterated Intel’s IDM 2.0 goals and that they are on track at the moment.
While up to US$20 billion is being invested for new fabs in Arizona, USA, to bolster wafer production and to serve up its chip manufacturing services to others via a new Intel Foundry Services branch (again, part of IDM 2.0), they’ve also shared not long ago that Intel is investing a further US$3.5 billion in New Mexico, USA, for advanced packaging facilities, as well as a further US$7 billion in Intel Penang for both packaging and testing facilities among others to come. By 2032, Intel estimates that they will have invested a total of US$14 billion in their Malaysia operations. Once these added facilities are up and running, Intel Penang’s manufacturing space will increase just over two-fold to over 2 million square feet.
(Image source: Intel)
(Image source: Intel)
Those are no small figures or processes, so what exactly happens in Malaysia after Intel sends over its silicon wafers? Here's a 60-second overview in our TikTok reel, but read on for the titillating details.
Stage 1: Die Prep and Die Sort
After the wafers are dispatched from the fab, they are sent to suitable processing facilities worldwide to prep and sort the dies that are etched on thsoe wafers. The Kulim Die Sort and Die Prep (KMDSDP) in Malaysia is one such processing facility.
Mylar backing tape is used to handle the wafers as they offer high tensile strength in addition to many other favourable properties, but because they are highly sensitive to UV light and will degrade in conventional lighting, wherever mylar is used, the factory is lit in amber lighting, which blocks certain UV wavelengths. (Image source: Intel)
300mm wafers are the standard size produced these days, and they are received at Kulim, where they are singulated into individual chips via a series of processes.
This involves grinding (thinning the wafers to suit the target profile such as certain mobile devices), die separation via precision laser scribing, followed by mechanical cutting using diamond-tipped blades to perform the cut while having chilled water flowing over them to regulate the necessary temperatures to prevent expansion, warping and clearing the cut debris. As with any other factory tour, we weren’t allowed to film on our own devices and had to rely on Intel-certified media for sharing. Unfortunately, there wasn’t a suitable media to showcase what we’ve just mentioned. Still, we can tell that all these are done with surgical precision thanks to advanced robotics and sensors working in unison.
After die singiulation, individual chip dies are available to be picked and transferred… (Image source: Intel)
… and placed onto a transfer media tray with the assistance of robotic arms applying the right amount of vacuum strength that frees the individual die from the mylar tape backing. (Image source: Intel)
The individual chips are then placed into transfer media, which move onto subsequent sort operation. In this process, the chips are tested to check for defects and measure their performance. To achieve this task, every chip is tested by a bus-sized sort module comprising 20 individual test cells.
We weren’t kidding when we meant the sort module is the size of a bus. And there are loads of these all across the floor. Intel says they can test thousands of chips in an hour. (Image source: Intel)
To manage that scale of operations, automated guided vehicles are deployed to move the chip dies around in carrier lots to the most suitable tester that’s available to process these chips. You might be interested to know they play an ice cream truck melody to keep humans aware that an AGV is approaching or is around a corner. Who can ignore an ice cream truck? Good call, Intel. (Image source: Intel)
This is where the dies are tested, sorted and characterised by their capabilities via lots of electrical signal testing. Most tests are conducted autonomously with die lots ferried by automated guided vehicles (AGVs) and fed into a suitable test bank, which can self-manage and test each die from the tray of dies supplied. These ‘self-roving ferries’ lower staffing needs and rule out human errors throughout the cycle. However, at all times, lab technicians and specialists are in the loop via monitoring stations spread throughout the floor to oversee several testing modules and their status.
Each test cell weighs about 1000 pounds and is moved around by a custom-designed lifter mechanism (not shown here), which floats on a cushion of air, much like a hovercraft. (Image source: Intel)
Each chip is tested on a probe card, which interestingly contains thousands of fine needles thinner than human hair and connect to the integrated circuit inside the test equipment. This helps measure the electricity of the chip circuits for reliability and defect analysis.
Each test unit can be configured to take in various types of chips via a swappable circuit board, which would differ from chip type and class to allow a variable set of parameters to be tested and checked for suitability of the processor class. (Image source: Intel)
Once tested and sorted, the chips are placed onto different reels associated with their capabilities (kind of like how they derive SKUs), with tape layers protecting the dies for safe transport to the Assembly and Test factories of the next stage to transform them into a fully completed processor.
Easily mistaken as a tape reel, these die reels are ready to move on to the assembly and test plant, where a die becomes a processor.
Stage 2: Advanced Packaging (Assembly Phase One)
Foveros: 3D die-stacking done at scale
Chip reels arrive at Assembly and Testing facilities like Penang (PGAT) to be prepped for advanced packaging. This is an additional stage in chip manufacturing where processors designed for Intel’s Foveros packing technology will first be sent for wafer-level 3D packaging (also known as Advanced Packaging) before being attached to a PCB substrate and attaching its heat spreader.
The upcoming Meteor Lake processors are designed to use Foveros 3D die-stacking technology, and it’s a big deal. This advanced packaging type allows Intel to use disaggregated architectures to assemble a processor by matching the right process technology to be applied to different processing blocks. Intel will no longer be tied to managing a single, complex, monolithic design, allowing a radical re-architecture of the processing blocks. Intel has hinted previously that Meteor Lake will be using various dies or tiles packaged densely over a silicon wafer interposer (or base tile). This is precisely what the Advanced Packaging process oversees– prep individual dies for each product as required and assemble and connect them onto the base wafer.

Stacked designs aren’t new, but the problem with existing package-on-package methods is that they only have a few hundred connections to connect things like the memory and processor in a system-on-chip solution. Foveras 3D packaging provides a very high-density bump count, maintains high efficiency and delivers extremely low latency – all of which are essential proponents to help embrace a high-speed disaggregated architecture with increasingly high bandwidth demands. We first reported about Foveros here and with comparisons to EMIB. You can check out the Intel video embedded above that better illustrates how Foveros helps build a new class of processors. (Disregard the additional EMIB packaging step, as it won’t apply to Meteor Lake. This clip was produced for their workstation Intel 4th-gen Xeon Scalable processor codenamed Sapphire Rapids, launched earlier this year and uses both Foveros and EMIB to manage this complex chip.)
Tiles - the future of processor packaging to support disaggregated, non-monolithic architectures in a compact package size that also has the necessary large number of contacts, high bandwidth and low latency.
Intel Malaysia’s expansion plan involves building a brand-new Advanced Packaging facility, codenamed Pelican, which is underway, but the tools required to manage Meteor Lake processor assembly are already present within their existing factory area. This is yet another critical reason why Intel has gathered tech journalists to show that Intel means business with their IDM 2.0 plan that’s in full swing.
Following this stage for Advanced Packaging, the 3D stacked wafer would go through a singulation process to carve out the singulated die (which we covered in the Die prep and Die Sort stage) before being ferried to the next phase of Assembly and Testing for its final packaging process. Head over to the next page to see how the dies finally get to be completed processors!
Stage 3: Assembly and Test (Assembly Phase Two)
At the Penang Assembly and Test (PGAT) plant. (Image source: Intel)
In this stage of the assembly, it’s all about putting the final packaging touches, which includes mating the die or singulated die to its PCB with epoxy underfill, applying the thermal interface material to help the processor transfer heat evenly to its integrated heat spreader (IHS), which will also be at attached in the final stage of the assembly, again with a suitable epoxy resin.
In this sample layout, you can see all the different assembly items coming together in the Assembly and Test plant to produce a fully functional processor with die tiles, spacer, IHS and all of these mounted on their respective PCBs with necessary epoxy. (Image source: Intel)
Lastly, the completed package will pass through a curing process to ensure the entire die is soundly attached to its PCB and HIS. Let’s roll a video that covers this whole process rather well.

Stage 4: Burn-in and Functional Testing
(Image source: Intel)
Once a finished CPU rolls out of the lid attach process, it is loaded into trays for the burn-in test. To screen out defects, the finished product is stressed at high temperatures and voltage. Following burn-in, a series of electrical tests are performed to ensure only functional devices are shipped to customers.
All of the above-mentioned take place at Intel Malaysia's Design and Development labs, which are well equipped for product functional testing and evaluation needs. Testing is done on rows of shelves with setups that look like an open testbed (somewhat like a never-ending version of our lab test racks) but with added testing equipment, including things like a PCIe signal integrity checker. This includes testing of all electrical traces and as well as functionality. This lab also tests actual use-case scenarios with operating systems and real-world software run on them via batch testing.
PCIe 5.0 signal generator testing in progress since the interface stems from the CPU these days.
Endless rows of test racks to scrutinize every functional aspect in real-world usage, too. (Image source: Intel)
Lastly, when they encounter any anomalies or failures in any particular area of testing, they are also equipped with a Failure Analysis Lab to probe the chips more thoroughly so that the engineers can provide feedback on any findings upstream for process tweaking and resolution.
One of the many tools in their arsenal for failure analysis. (Image source: Intel)
It’s not obvious here, but the top screen showed screen anomalies depicting issues with the display engine pipeline. Intel is very particular to test all functional aspects and in real-world use before the chips go out for deployment. (Image source: Intel)
Making their own test equipment and Closing remarks
We've been privileged to see the inner workings at Intel's Malaysia factories to bring a processor to life.
While we’ve been to various tech factories and design centres around the world, the difference is that the Intel processor is at the very heart of a finished product. In a typical laptop assembly line, it’s likely to be the first component handled and to be mated with a corresponding motherboard. The processor in laptops is usually soldered onto an integrated, customised motherboard, which means if the CPU screws up, not only is it difficult and expensive to replace the whole board, but the entire system is grounded for good. This same analogy applies to many other integrated systems, which is why there’s a lot of pressure on the chip maker to ensure the CPU is of extremely high yield and high quality to stave off problems that might be encountered further down the production line.
Intel SIMS at Kulim is where custom test equipment is specced, made and shipped out throughout the world.This is a system level tester (SLT) which is used to confirm Intel products will function in a customer-like environment. (Image source: Intel)
This is why Intel prides itself in extensive in-house testing at various phases of the assembly and manufacturing, including building and designing its very own testers, which also happen here in Intel Penang’s System Integration and Manufacturing Services (SIMS) and are then shipped worldwide across its other test and assembly sites. Clearly, Intel Penang has been quite the unsung hero for its global operations and for helping deliver some of the most advanced processors to the market.
High Density Burn-In (HDBI)Tester: An Intel developed tester that provides the capability to perform Burn-In stress testing on high temperature and voltage on Intel CPUs. (Image source: Intel)
High Density Modular (HDMT) Tester: An Intel developed tester that provides the capability to perform class or backend testing on Intel CPUs. This tester is used in Intel Factories and Labs for new products development and CPU production ramping. (Image source: Intel)
Is Intel’s IDM 2.0 multi-pronged approach to having a fully integrated factory and partnering with external suppliers (such as TSMC) its ace against all other processor and semiconductor players? We sure hope so, but from what we’ve seen, it’s impressive.
Read Next:
1) Check out other factory tours we've reported
2) All about the new Meteor Lake architecture
3) Intel ushers in the age of the AI PC
4) These are all the new Core Ultra processors launched
5) Intel is betting on glass substrates for future high-performance chips
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